Rectifying Various Scan-based Attacks on Secure IC'S

Preventing scan-based attacks on secure-ICs with on-chip comparison

Hardware implementation of secure applications, e.g. cryptographic algorithms, is subject to various attacks. In fact, it has been previously demonstrated that scan chains introduced by Design for Testability open a backdoor to potential attacks. Here we propose a scan-protection scheme that provides testing facilities both at production time and over the course of the circuit’s life. The under...

Side-Channel Attacks on SHA-1-Based Product Authentication ICs

To prevent product counterfeiting, a common practice is to cryptographically authenticate system components (e.g., inkjet cartridges, batteries, or spare parts) using dedicated ICs. In this paper, we analyse the security of two wide-spread examples for such devices, the DS28E01 and DS2432 SHA-1-based authentication ICs manufactured by Maxim Integrated. We show that the 64-bit secret can be full...

On-Chip Comparison for Testing Secure ICs

Hardware implementations of secure applications, e.g. cryptographic algorithms, are subject to various attacks. In particular, it has been demonstrated that scan chains introduced by Design for Testability open a backdoor to potential attacks. In this paper we propose a scan protection scheme that provides testing facilities both at production time and during the circuit’s lifetime. The underly...

Attacks on Secure Logging Schemes

We present four attacks on three cryptographic schemes intended for securing log files against illicit retroactive modification. Our first two attacks regard the LogFAS scheme by Yavuz et al. (Financial Cryptography 2012), whereas our third and fourth attacks break the BMand AR-FssAgg schemes by Ma (AsiaCCS 2008). All schemes have an accompanying security proof, seemingly contradicting the exis...

Timing Attacks on Secure Systems